Part of the Leibniz binary system (Drezno, Erfurt, Jena, Lipsk, Poczdam)
8 gate/binary inputs
Logical operation of Leibniz data
Masking of single bits manually and controlled by gate signals
Visual display by illuminated keys
Xaoc Devices Gera & Poczdam
Gera from XAOC Devices is a component of the Leibniz subsystem that enables masking of individual bits of digital data by logical AND operation. The module has eight gate inputs with which the individual data bits are influenced, as well as eight illuminated buttons for manual inversion of each control input. When connected to Drezno which processes a waveform or voltage, masking of the individual bits results in various forms of quantization. The bit processing logic in Gera is hardware-based, so there is virtually no latency, and the binary signals can change at extreme rates.